PV2 ⊧ Speculoos: SPECification LOgics fOr Synthesisgenerates AIGER circuits based on descriptions of register updates and output expressions

Set of tools for Register Transfer Level hardware description

Application domain/field

• Hardware description
• Synthesis

Type of tool

Synthesis tool?

Expected input

Description of register updates and output expressions?

Format:

Own language, .spec file

Expected output

AIGER circuit

Internals

Given a basic language, it can generate AIGER files.