PV2 ADACsynthesises an approximate circuit from a given one and a set of constraints

Application domain/field

Type of tool

Framework to design approximate arithmetic circuits

Expected input


Expected output

Approximate circuit satisfying the error threshold and with minimal estimated chip area (in gate-level Verilog format).


Implemented as a module of ABC. Uses Yosys, iprove, MiniSat.


https://github.com/imatyas/ADAC (this is linked in the paper but it contains very little useful information)

Related papers

Last publication date

15 April 2020

Related tools

SALSA, SASIMI are mentioned as general-purpose methods for approximating circuits independently of their structure.

ProVerB specific

ProVerB is a part of SLEBoK. Last updated: February 2023.